1.Main equipments used in the test are: CTS-23 ultrasonic tester, CDX-III magnetic powder detester, Spartan AT-24 channel AE monitor (US), hydro-pluses tired-test machine, YT-18 static resistance strain measurers.
试验所用的主要设备有：CTS-23超声波检测仪，CDX-Ⅲ磁粉探测仪，Spartan AT-24通道声发射监测仪(美国)，液压脉动疲劳试验机，YJ-18静态应变仪。
2.This Rake receiver adoptdifferent buffer structure,it can economize a lot of hardware resource, and the Rakereceiver has low power. At last, we designed primary modules with Verilog HDL andemulated with software ISE 6.2 of Xilinx Inc. The emulator platform is XC3S1000chip of Spartan-3. the results of emulator prove this design to be right.
最后利用Verilog HDL语言对其中的主要模块进行编程设计,并在Xilinx公司的集成开发工具ISE6.1中进行仿真,仿真平台为Spartan-3系列中的XC3S1000芯片。
3.The text adopted Xilinx Spartan II series XC2S300E achieve non-standard chip design PAL→ VGA converters, for from now on will design the big scale the integrated circuit provides may the direct use IP nucleus.
文中采用了XILINX的Spartan Ⅱ系列XC2S300E芯片实现了非标准PAL→VGA转换器的设计，为今后设计大规模的集成电路提供可直接利用的IP核。
4.This paper introduces the implementing methods of transferring from the 738*575 PAL digital video signal to the 800*600 VGA format based on Xilinx Spartan-3E FPGA XC3S250E.
介绍了基于Xilinx Spartan-3E FPGA XC3S250E来完成分辨率为738×575的PAL制数字视频信号到800×600的VGA格式转换的实现方法。
5.On the Xilinx Spartan-II XC2S100 implementation the radix-4 DIT 1024-point FFT on 20MHz.
在Xilinx公司的Spartan-II XC2S100上实现了20MHz数据输入,输出的1024点按时域抽取FFT。
6.Micrografting of Golden Delicious and Spartan apples (Malus domes- tica Borkh) was achieved by placing a 0.2,0.4 or 0.7mm shoot tip on the 0.5-1.2cm stems or roots of Siberian crab seedlings (Malus bac- cada L.)
本研究用金帅和斯巴丹(Spartan)两个苹果品种的茎顶在离体条件下分别嫁接在山定子、M_7、M_9和 M_(26)的茎或根上,并获得成功。
7.This design adopts programmable logic device FPGA,and realizes on XC2S100ePQ208-6 chip of SpartanⅡ series of Xilinx Company on the basis of VHDL.
设计采用了可编程逻辑器件FPGA,并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的XC2S100ePQ208-6芯片上编程实现;
8.This architecture is developed from aparallel VLSI architecture for FS. Moreover, function modules of 2SS motionestimation are set off. And they are designed, implemented and simulated with VerilogHDL, ISE and Modelsim on Spartan-IIE XC2S300e FPGA chips.
本文对已有的用于全搜索算法实现的VLSI结构进行了改进,设计了符合二步搜索算法要求的FPGA实现结构,并在对其理论分析之后,对实现该算法的运动估计模块进行了功能模块的划分,并运用Verilog HDL硬件描述语言、ISE及Modelsim开发工具在Spartan-IIE XC2S300e FPGA芯片上完成了对各功能模块的设计、实现与时序仿真。
9.Spartan King Leonidas:This is where we fight!This is where they die!
斯巴达国王列奥尼达:"这里,就是我们要作战的地方!这里,就是入侵者们下地狱的地方!"
10.2 Their life style could seem Spartan to a city family with its assets.
对一个家产殷实的城市家庭来说，他们的生活方式似乎有点太奢侈放纵了。
