1.In this paper we use the folding-regression analysis, to make the analyses respectively between the solar radio observations at 9375 MHz, 3653 MHz and 2902 MHz at Yunnan Observatory and those of 9400 MHz (Toyokawa), 3750 MHz (Toyokawa) and 2800 MHz (Ottawa).
本文采用折叠回归分析法,将云台9375MHz、3653MHz、2902MHz、观测资料分别同9400MHz(TOYOKAWA)、3750MHz(TOYOKAWA)和2800MHz(OTTAWA)的同期观测资料进行了分析。
2.A lithium niobate anisotropic acousto-electro-optic spectrum analysor with central frequency 60 MHz was made. Its central frequency can be changed from 50 MHz to 70 MHz and its bandwidth can be increase from 26 MHz to 37 MHz.
用LiNbO3制作了一个60MHz的反常声电光频谱分析器件，测试结果表明，器件中心频率可以由50MHz变到70MHz，频带宽度由原来的26MHz扩大到37MHz。
3.The 308 MHz/315 MHz/418 MHz/433.92 MHz low power FSK Superheterodyne Receiver adopts high integrated,low power,CMOS Superheterodyne RF receiver chips in MAX7042,with a sensibility range from-110 dBm to-109 dBm,receiving a FSK data which speed up to 66 kbps(NRZ)(33 kbps Manchester code).
所设计的308 MHz/315 MHz/418 MHz/433.92 MHz低功耗FSK超外差式接收电路,采用MAX7042高集成度、低功耗,CMOS型超外差式射频(RF)接收芯片,灵敏度为-110~-109 dBm,接收频移键控(FSK)数据速率可达66 kbps(NRZ)(33kbps曼彻斯特编码);
4.It has two side patches, which operate at GSM900MHz. And it has a center patch with a slot, which has two MEMS switch on it, and can switch its operation band in GSM1800MHz, GSM1900MHz and WLAN2400MHz. The gain of the MEMS frequency reconfigurable PIFA reaches 1.5dB in all the operation band.
该天线在工作于GSM900MHz频段的同时,可以实现在GSM1800MHz和GSM1900MHz以及WLAN2400MHz三个频段之间的切换,增益达到1.5dB以上。
5.The forthcoming chip, code?named Coppermine, will run at desktop speeds when plugged in, about 600-MHz to 650-MHz, and at a slower speed, perhaps as much as 100-MHz to 150-MHz slower, when disconnected.
这个代号叫铜矿的新芯片，当插上电源时，在台式机上以600MHz至650MHz速度运行，当断开电源时，它以100MHz至150MHz较低的速度运行。
6.Above all, [12:8] Harming error correction theory is mentioned in this paper. The EDAC circuit designed by VHDL can works normally at different frequency of the CPU clock such as 66MHz50MHz40MHz33MHz. The EDAC function of the circuit can also be disabled by software tool.
本论文阐述了［12，8］汉明码纠错设计过程，采用VHDL语言实现纠错编码器（EDAC），本设计能够适应CPU时钟信号CLK2的不同频率，如66MHz、50MHz、40MHz、33MHz，并且能够通过软件的控制使FPGA的纠错编码功能关闭。
7.Methods Conventional abdominal multi-section (longitudinal,transverse and oblique) scanning was performed among 84 cases of abdominal mass of children by usiny Nas-2000 color Doppler ultrasonic diagnosis apparatus CTS-310B urtrasonic apparatus and 3. 5MHz> 5MHz, 7MHz urtrasonic probe.
方法使用Nas-2000彩色超声诊断仪、CTS-310D超声仪,使用3.5MHz、5MHz、7MHz超声探头。
8.In these two systems, the intermediate frequency (IF) center frequencies are stabilized at 1.05 GHz±1 MHz and 810 MHz±1 MHz, respectively, by an AFC.
在这两个系统中,中频(IF)经AFC分别稳定在1.05 GHz4±1 MHz和810MHz±1MHz。
9.The experiment waveform generation can generate 30 MHz Continuous Wave (CW), Linear Frequency Modulation Continuous Wave (LFMCW) with 10 MHz bandwidth working at 30MHz carrier, simulated echo of object which is delayed LFMCW signal. The test results completely meet the system requirements.
该波形产生器可产生30 MHz频率的连续波(CW)信号,带宽10MHz、中心频率30MHz的线性调频连续波(LFMCW)信号,目标回波模拟信号,技术指标完全达到了系统总体设计要求。
10.Thefrequencies of two input interdigital transducers are individually 180MHz and140MHz with the same bandwidth of 20MHz. The surface acoustic wave generatedby the input is coupled to the output which is composed with ten same structure IDTs.
它具有两个不同频率(140MHz、180MHz)、相同带宽(20MHz)的输入叉指换能器，通过耦合器将输入的两种不同频率信号单独或同时耦合于同一个由10个相同结构叉指换能器组成的延迟线输出结构中。
